हम आपके अनुभव को बेहतर बनाने, साइट उपयोग का विश्लेषण करने और हमारे मार्केटिंग प्रयासों में सहायता के लिए कुकीज़ और समान तकनीकों का उपयोग करते हैं। गोपनीयता नीति
पोस्ट का समय:
Shield AI is a venture-backed defense-tech company with the mission of protecting service members and civilians with intelligent systems. Its products include Hivemind autonomy software, V-BAT and X-BAT aircraft, and Aechelon simulation and synthetic reality technologies. With offices and facilities across the U.S., Europe, the Middle East, and Asia-Pacific, Shield AI’s technology actively supports operations worldwide. For more information, visit www.shield.ai. Follow Shield AI on LinkedIn, X, Instagram, and YouTube. Design and develop FPGA-based communication modules for advanced UAV platforms. Develop solutions that enable precise timing synchronization and redundance across flight controllers. Integrate FPGA solutions with system-level architecture in collaboration with cross-functional engineering teams. Perform synthesis, implementation, timing closure, bitstream generation. Debug, test, and optimize for reliability, latency, and throughput. Collaborate with PCB designers during board bring-up and hardware validation. Contribute to FPGA architecture discussions and help define long-term technical direction within the platform. Participate in design reviews and maintain engineering documentation. B.S., M.S, PhD degree in Electrical Engineering, Computer Engineering or STEM (Science, Technology, Engineering, or Mathematics) discipline, such as Aerospace, Mechanical, or Electrical Engineering Strong experience with FPGA design, implementation, and verification using VHDL or SystemVerilog. Demonstrated ability to build reliable, high-performance digital communication systems. Solid understanding of timing closure, clock domain crossing, and system-level integration. Comfortable working in a fast-paced, collaborative environment with evolving requirements. Strong debugging and problem-solving skills. Knowledge of FPGA timing analysis and timing closure techniques. Familiarity with version control tools such as Git. Strong debugging and problem-solving skills. Experience with Xilinx FPGA ecosystem (Vivado, toolchains, etc). In-depth understanding of ethernet and network stack implementation. Experience developing flight computers Experience designing solutions for safety-critical real-time systems. Experience with AXI4, AXI-Stream, and memory-mapped interfaces. Experience using TCL scripting to automate FPGA build flows. Knowledge of CI/CD practices for FPGA development.